The present invention relates a clock signal generating scheme, and more particularly to a clock signal generating apparatus implemented by hardware control, and a corresponding method.
Generally speaking, in order to generate two clock signals having different oscillation frequencies, two oscillators such as crystal resonators are respectively employed and configured in a single clock signal generating circuit. However, when the two independent oscillators are configured in the same clock signal generating circuit, it is very easy to introduce crosstalk into clock signals generated by the single clock signal generating circuit. Due to the crosstalk, qualities of the clock signals generated by the clock signal generating circuit having two independent oscillators will be degraded significantly. In addition, if it is required to use a circuit switching scheme to appropriately select a correct clock signal from the different clocks signals generated by the single clock signal generating circuit as an output, then undesired glitch signals may be easily caused and introduced into the whole circuitry system. As a result, the qualities of the clock signals will be degraded significantly due to the undesired glitch signals. Thus, it is very important to provide a scheme for generating two clock signals having different oscillation frequencies and capable of avoiding/reducing signal crosstalk and undesired glitch signals.